TEVOS

Validation Engineer

Ge Vernova · Hyderabad, India

Engineering Mid Full-time Verified source Salary not disclosed

Posted 25 Oct 2026 (first seen by Tevos)
Last confirmed 26 Oct 2026 (last seen by Tevos)

Apply on Ge Vernova site ↗

Job description

Job Description Summary

Validation Engineer will participate in embedded firmware and system software validation for the Mark VIe platforms. You will work in a global environment with a skilled cross functional team of engineers creating and improving state-of-the-art platform for use in every kind of power generation application.

Job Description

Essential Responsibilities

Successful candidates are expected to exhibit some or all the below areas for this profile:

  • Owns coordination, Integration, validation (including validation environment), and debugging of system software.
  • Develop and maintain system level setups for product validation.
  • Ability to see system level “big picture” to validate integrated firmware/system software for the architectural goals of product.
  • Create validation plans, develop, automate & execute test cases along with debug/triage of observed/reported failures.
  • Excellent debugging and troubleshooting skills with the aim to become point-of-contact for platform level issues. Ensure systematic closure of issues for subsequent releases.
  • Deeply collaborate with architect, firmware, program management and component development teams for day-to-days operations as well as for long term roadmap improvements by feeding back key learnings
  • Passionate about exploring and deploying noble methods to improve test coverage, release/test automation, and efficiency of our firmware/software releases.
  • Collaborate with technicians to maintain/improve the validation setup.
  • Work with sourcing team to procure hardware/software required for execution.

Qualifications/Requirements

Test engineer should have 3+ yearof experience in testing & test script development.

Significant knowledge in embedded testing.

knowledge of Bug Life Cycle (Visual studio TFStool knowledge is a plus)

Hands on experience in using instruments (Function Generator, DMM etc.)

Test execution / development in visual studio (C# / spec flow / Gherkin).

Should be able to analyze the failures in the script.

Desired Characteristics

  • Experience with Control Systems validation for MarkVIe.
  • Experience working with Industry protocols like MODBUS, Profibus, Profinet, FF, CAN, Ethernet
  • Self-starter, able to work with multi-functional teams (Hardware, Software, System Test. etc.)
  • Good interpersonal skills.
  • Able to work in cross-functional and global teams

Additional Information

Relocation Assistance Provided:Yes

Source: Ge Vernova careers page, collected by Tevos on 26 Oct 2026; verify details on the employer site. Tevos does not take applications — the Apply button opens the employer’s own page.

Apply on Ge Vernova site ↗