TEVOS

Digital Design Engineers - 7 openings

Kandou Ai · Hyderabad, Bangalore · India

Engineering Mid Full-time Verified source Salary not disclosed

Posted 25 Oct 2026 (first seen by Tevos)
Last confirmed 26 Oct 2026 (last seen by Tevos)

Apply on Kandou Ai site ↗

Job description

At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO)of hardware systems - a critical barrier to scalable adoption.

Our proprietary MIMO-over-copper technologypowers a high-performance, Chiplet-based AI memory fabricthat is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantlywhile preserving high bandwidth and ultra-low latency - unlocking unprecedented efficiency for AI training and inference at scale.

Kandou’s architecture is not just an incremental improvement - it’s a foundational shiftin how AI hardware is built for the future.

Location: Bangalore OR Hyderabad

Department:Semiconductor Design Engineering

Experience Level:5–10 Years

Employment Type:Full-Time

About the Role:

We are seeking for talented Mid-Level Digital Design Engineers to contribute to the development of high-performance digital circuits for next-generation communication and memory interfaces. The ideal candidate will have strong experience in high-speed digital design, semiconductor development flows, and cross-functional collaboration with verification and analog/mixed-signal teams.

Key Responsibilities:

  • Define digital architecture concepts and specify analog-to-digital interfaces.
  • Develop RTL for high-speed digital blocks and contribute to IP verification and basic DFT implementation.
  • Perform logic synthesis and support timing analysis activities.
  • Design and verify high-performance digital circuits meeting area, timing, and power requirements.
  • Develop block-level specifications based on system-level requirements.
  • Collaborate closely with verification, physical implementation, and analog/mixed-signal engineering teams.
  • Analyse and implement high-speed serial protocols (e.g., USB4, PCIe).
  • Support post-silicon bring-up, debugging, characterization, and productization.
  • Validate and test silicon in laboratory environments.

Required Qualifications:

  • B.E/B.Tech./B.S/M.E/M.Tech/M.S in Electrical Engineering, Electronics, Communications, VLSI, Microelectronics or related field.
  • 5–10 years of semiconductor industry experience in digital design.
  • Proven experience in high-speed digital circuit design using deep-submicron CMOS technologies.
  • Experience designing digital circuits for multi-gigabit serial data-link transceivers, DDR, or high-performance memory interfaces.
  • Experience with industry-standard EDA tools for design, simulation, and verification.
  • Strong background in complex digital system design and verification.

Preferred Qualifications:

  • Experience with Industry Standard design tools.
  • Experience with multi-gigabit serial data transceivers.
  • Exposure to analog/digital control interfaces.
  • Knowledge of synthesis, static timing analysis (STA), and signal processing techniques.
  • Familiarity with verification methodologies and tools.

Technical Skills:

  • RTL design expertise including CDC analysis and linting.
  • Strong scripting and automation skills (Python preferred).
  • Solid understanding of high-speed, low-power digital design techniques.
  • Ability to translate system-level requirements into detailed digital implementations.
  • Strong analytical, problem-solving, and debugging skills.
  • Effective communication and collaboration abilities.

Visit us at www.kandou.ai and https://www.linkedin.com/company/kandou-ai/

Source: Kandou Ai careers page, collected by Tevos on 26 Oct 2026; verify details on the employer site. Tevos does not take applications — the Apply button opens the employer’s own page.

Apply on Kandou Ai site ↗